Synchronized State in Networks of Digital Phase-Locked Loops

Jean-Michel Akre (1) , Jérôme Juillard (1) , Dimitri Galayko (2) , Eric Colinet (3)

1 E3S - Supélec Sciences des Systèmes
2 CIAN - Circuits Intégrés Numériques et Analogiques
3 DSYS - Département Systèmes

Clock distribution networks of synchronized oscillators are an alternative approach to classical tree-like clock distribution methods. Each node of the network may consist of a phase-locked loop (PLL) trying to match the phase of its neighbors. Then a network of independent oscillators takes the place of the centralized clock source, providing separate clock signals to the physically distant parts of the system. In the discrete case, the digital filter is necessarily operated asynchronously: each operation is triggered by a rising edge of the locally-generated clock, the frequency and phase of which vary as the whole system tries to synchronize. The locking behavior, the synchronous state and the stability conditions of such a system are analyzed. Similarly, the synchronization of an autonomous network of two self-sampled PLLs is studied. Surprisingly, its analysis is much simpler than that of the single PLL.

Domaines: Automatique / Robotique; Electronique

Jean-Michel Akre, Jérôme Juillard, Dimitri Galayko, Eric Colinet. Synchronized State in Networks of Digital Phase-Locked Loops. 8th IEEE International NEWCAS Conference (NEWCAS'10), Jun 2010, Montreal, Canada. pp.89-92, ⟨10.1109/NEWCAS.2010.5603916⟩. ⟨hal-00525252⟩