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Communication Dans Un Congrès Année : 2020

Design of a Novel Hybrid CMOS Non-Volatile SRAM Memory in 130nm RRAM Technology

Résumé

Static Random-Access Memories (SRAMs) are an integral part of the chip industry, occupying a noticeable share of the memory market due to their high performance and compatibility with CMOS technology. Traditional SRAMs lack the capability to retain data after power-off, restricting their availability in applications such as battery-powered mobile devices where non-volatility associated with zero-leakage currents is needed. This paper presents a novel Non-Volatile SRAMs (NVSRAMs) device based on Resistive RAM (RRAM) technology. A comparison between SRAM and NVSRAM performances is proposed at both cell and memory array level. The comparison covers several metrics such as power consumption, area and design complexity. The presented circuits are implemented in a 130-nm high voltage CMOS technology from STMicroelectronics.
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Dates et versions

hal-03504830 , version 1 (29-12-2021)

Identifiants

Citer

Hussein Bazzi, Hassen Aziza, Mathieu Moreau, Adnan Harb. Design of a Novel Hybrid CMOS Non-Volatile SRAM Memory in 130nm RRAM Technology. Design, Technology, and Test of Integrated Circuits and Systems, Apr 2020, virtual, Morocco. ⟨10.1109/DTIS48698.2020.9081153⟩. ⟨hal-03504830⟩
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