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Conference papers
DESIGN OF A 3 GHz 6TH ORDER DELTA-SIGMA MODULATOR IN A 0.2 μm GaAs TECHNOLOGY
Abstract : This paper presents the design of a monobit 6th order delta-sigma modulator in a GaAs 0.2 μm technology. The central frequency is 750 MHz and the sampling frequency is 3 GHz. The reached resolution is 10.5 bits over a 10 MHz bandwith. The modulator operates from ± 5 V power supplies and consumes 5.7 W. Each block of the modulator is presented at transistor level. Two drawbacks are pointed out: low pass terms of Gm-LC resonators and the lowpass characteristic of the adder. Two solutions are proposed. Finally, simulation results of the complete modulator are given.
Cited literature [9 references]
https://hal-supelec.archives-ouvertes.fr/hal-00258577
Contributor : Karine El Rassi Connect in order to contact the contributor
Submitted on : Friday, February 22, 2008 - 3:47:38 PM
Last modification on : Monday, December 14, 2020 - 12:28:24 PM
Long-term archiving on: : Thursday, May 20, 2010 - 11:24:44 PM
Contributor : Karine El Rassi Connect in order to contact the contributor
Submitted on : Friday, February 22, 2008 - 3:47:38 PM
Last modification on : Monday, December 14, 2020 - 12:28:24 PM
Long-term archiving on: : Thursday, May 20, 2010 - 11:24:44 PM
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IASTED_CSS_531-129.pdf
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