DESIGN OF A 3 GHz 6TH ORDER DELTA-SIGMA MODULATOR IN A 0.2 μm GaAs TECHNOLOGY

Emilie Avignon 1 Sylvie Guessab 1 Richard Kielbasa 1 Jean-Marc Guebhard 2 Nicolas Fel 2 Jean Russat 2
1 SUPELEC-Campus Gif
2 DAM/DIF - DAM Île-de-France
Abstract : This paper presents the design of a monobit 6th order delta-sigma modulator in a GaAs 0.2 μm technology. The central frequency is 750 MHz and the sampling frequency is 3 GHz. The reached resolution is 10.5 bits over a 10 MHz bandwith. The modulator operates from ± 5 V power supplies and consumes 5.7 W. Each block of the modulator is presented at transistor level. Two drawbacks are pointed out: low pass terms of Gm-LC resonators and the lowpass characteristic of the adder. Two solutions are proposed. Finally, simulation results of the complete modulator are given.
keyword : GaAs circuits Analog-digital conversion Delta-sigma Modulator GaAs circuits.
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Emilie Avignon, Sylvie Guessab, Richard Kielbasa, Jean-Marc Guebhard, Nicolas Fel, et al.. DESIGN OF A 3 GHz 6TH ORDER DELTA-SIGMA MODULATOR IN A 0.2 μm GaAs TECHNOLOGY. International Conference on Circuits, Signal and Systems, Nov 2006, San Francisco, United States. pp. 205-210. ⟨hal-00258577⟩

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