A Design Approach for Networks of Self-Sampled All-Digital Phase-Locked Loops

Jean-Michel Akré 1 Jérôme Juillard 1 Mohammad Javidan 2 Eldar Zianbetov 2 Dimitri Galayko 2 Anton Korniienko 3 Eric Colinet 3
1 E3S - Supélec Sciences des Systèmes [Gif-sur-Yvette]
2 CIAN - Circuits Intégrés Numériques et Analogiques
LIP6 - Laboratoire d'Informatique de Paris 6
3 CEA-LETI - Laboratoire d'Electronique et des Technologies de l'Information
Abstract : This paper addresses the problem of the stability and the performance analysis of N-nodes Cartesian networks of self-sampled all digital phase-locked loops. It can be demonstrated that under certain conditions (such as filter coefficients value) a global and a local synchronization can be obtained. Our approach to find the optimal conditions consists in analyzing an corresponding linear average system of the Cartesian network rather than constructing a piecewise-linear system which is extremely difficult to analysis. The constructed corresponding system takes into account the non-linearity of the network and especially the self-sampling property. It is then analyzed by linear performance criteria such as modulus margin to guarantee a robust stability of the Cartesian network. The reliability of our approach is proved by transient simulations in networks of different sizes.
Document type :
Conference papers
Complete list of metadatas

Cited literature [7 references]  Display  Hide  Download
https://hal-supelec.archives-ouvertes.fr/hal-00633011
Contributor : Karine El Rassi <>
Submitted on : Monday, October 17, 2011 - 12:14:13 PM
Last modification on : Wednesday, May 15, 2019 - 3:39:19 AM
Long-term archiving on : Wednesday, January 18, 2012 - 2:25:30 AM

File

ECCDT_2011.pdf
Files produced by the author(s)

Identifiers

Collections

CEA | SUPELEC | INSMI | UPMC | LIP6 | DRT | TDS-MACS | LIP6-CIAN | LETI | SORBONNE-UNIVERSITE | CEA-GRE | SU-SCIENCES

Citation

Jean-Michel Akré, Jérôme Juillard, Mohammad Javidan, Eldar Zianbetov, Dimitri Galayko, et al.. A Design Approach for Networks of Self-Sampled All-Digital Phase-Locked Loops. 20th European Conference on Circuit theory and Design (ECCTD'11), Aug 2011, Linköping, Sweden. pp.725-728, ⟨10.1109/ECCTD.2011.6043646⟩. ⟨hal-00633011⟩

Export

BibTeX TEI DC DCterms EndNote

Share

Metrics

Record views

723

Files downloads

178

Contact

support.ccsd.cnrs.fr
hal.support@ccsd.cnrs.fr
Logo CCSD