 |
ECOLE SUPÉRIEURE D'ÉLECTRICITÉ Une grande école d'ingénieurs au cœur des sciences de l'information,de l'énergie et des systèmes |
 |
Conference papers
A Design Approach for Networks of Self-Sampled All-Digital Phase-Locked Loops
Abstract : This paper addresses the problem of the stability and the performance analysis of N-nodes Cartesian networks of self-sampled all digital phase-locked loops. It can be demonstrated that under certain conditions (such as filter coefficients value) a global and a local synchronization can be obtained. Our approach to find the optimal conditions consists in analyzing an corresponding linear average system of the Cartesian network rather than constructing a piecewise-linear system which is extremely difficult to analysis. The constructed corresponding system takes into account the non-linearity of the network and especially the self-sampling property. It is then analyzed by linear performance criteria such as modulus margin to guarantee a robust stability of the Cartesian network. The reliability of our approach is proved by transient simulations in networks of different sizes.
Cited literature [7 references]
https://hal-supelec.archives-ouvertes.fr/hal-00633011
Contributor : Karine El Rassi <>
Submitted on : Monday, October 17, 2011 - 12:14:13 PM
Last modification on : Friday, January 8, 2021 - 5:32:07 PM
Long-term archiving on: : Wednesday, January 18, 2012 - 2:25:30 AM
Contributor : Karine El Rassi <>
Submitted on : Monday, October 17, 2011 - 12:14:13 PM
Last modification on : Friday, January 8, 2021 - 5:32:07 PM
Long-term archiving on: : Wednesday, January 18, 2012 - 2:25:30 AM
File
ECCDT_2011.pdf
Files produced by the author(s)