Skip to Main content Skip to Navigation

Convertisseur analogique-numérique delta-sigma

Abstract : The invention relates on a sigma delta digital to analog converter, digitally sequenced by a clock, comprising a main line and a feedback line, the main line comprising: an input port, a linear filter G(z) and a multibit quantifier, a digital to analog converter, an output port, and the feedback line comprising a correcting memory table, able to process a correcting signal, and an adder able to subtract said correcting signal from an input signal, wherein the correcting memory table time cycle is k times greater than the clock time cycle.
Document type :
Complete list of metadata
Contributor : Alexandra Siebert Connect in order to contact the contributor
Submitted on : Thursday, December 19, 2013 - 3:02:45 PM
Last modification on : Saturday, November 20, 2021 - 3:50:10 AM


  • HAL Id : hal-00920991, version 1


Luc Dartois, Philippe Benabes. Convertisseur analogique-numérique delta-sigma. France, Patent n° : EP2544374 A1. 2013. ⟨hal-00920991⟩



Les métriques sont temporairement indisponibles