An OFDMA Based RF Interconnect for Massive Multi-core Processors

Eren Unlu 1 Mohamad Hamieh 2 Christophe Moy 1 Myriam Ariaudo 2 Yves Louët 1 Frédéric Drillet 2 Alexandre Brière 3 Lounis Zerioul 2 Julien Denoulet 3 Andrea Pinna 3 Bertrand Granado 2 François Pécheux 4 Patrick Garda 3 Cédric Duperrier 2 Sébastien Quintanel 2 Olivier Romain 2
1 IETR - Institut d'Electronique et de Télécommunications de Rennes
2 ASTRE [Cergy-Pontoise]
ETIS - Equipes Traitement de l'Information et Systèmes
3 SYEL - Systèmes Electroniques
LIP6 - Laboratoire d'Informatique de Paris 6
4 CIAN - Circuits Intégrés Numériques et Analogiques
LIP6 - Laboratoire d'Informatique de Paris 6
Abstract : A paradigm shift is apparent in Chip Multiprocessor (CMP) design, as the new performance bottleneck is becoming communication rather than computation. It is widely provisioned that number of cores on a single chip will reach thousands in a decade. Thus, new high rate interconnects such as optical or RF have been proposed by various researchers. However, these interconnect structures fail to provide essential requirements of heterogeneous on-chip traffic; bandwidth reconfigurability and broadcast support with a low complex design. In this paper we investigate the feasibility of a new Orthogonal Frequency Division Multiple Access (OFDMA) RF interconnect for the first time to the best of our knowledge. In addition we provide a novel dynamic bandwidth arbitration and modulation order selection policy, that is designed regarding the bimodal on-chip packets. The proposed approach decreases the average latency up to 3.5 times compared to conventional static approach.
keyword : NoC RF NoC OFDMA massive multicore
Document type :
Conference papers
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https://hal-supelec.archives-ouvertes.fr/hal-01068905
Contributor : Myriam Andrieux <>
Submitted on : Friday, September 26, 2014 - 2:56:57 PM
Last modification on : Tuesday, May 14, 2019 - 11:04:08 AM

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Eren Unlu, Mohamad Hamieh, Christophe Moy, Myriam Ariaudo, Yves Louët, et al.. An OFDMA Based RF Interconnect for Massive Multi-core Processors. NoCS 2014 - Eighth IEEE/ACM International Symposium on Networks-on-Chip, Sep 2014, Ferrara, Italy. pp.182-183, ⟨10.1109/NOCS.2014.7008784⟩. ⟨hal-01068905⟩

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