A gm/ID-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier

Abstract : Noise optimization is a challenging problem for nanoscale metal–oxide–silicon field-effect transistor circuits. This brief presents a technique that uses transconductance-to-drain current $(g_{m}/I_{D})$-dependent transistor-noise parameters to explore the design space and to evaluate tradeoff decisions. An expression for the corner frequency of the folded-cascode amplifier is derived. The design process demonstrated in this brief using the folded-cascode amplifier is applicable to a wide class of amplifier circuits.
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Article dans une revue
IEEE Transactions on Circuits and Systems Part 2 Analog and Digital Signal Processing, Institute of Electrical and Electronics Engineers (IEEE), 2014, 61 (10), pp.783 - 787
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https://hal-supelec.archives-ouvertes.fr/hal-01074273
Contributeur : Alexandra Siebert <>
Soumis le : mardi 14 octobre 2014 - 14:25:55
Dernière modification le : lundi 16 avril 2018 - 16:57:51

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  • HAL Id : hal-01074273, version 1

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Jack Ou, Pietro Maris Ferreira. A gm/ID-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier. IEEE Transactions on Circuits and Systems Part 2 Analog and Digital Signal Processing, Institute of Electrical and Electronics Engineers (IEEE), 2014, 61 (10), pp.783 - 787. 〈hal-01074273〉

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